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1 lt c1060 1060fb universal dual filter building block descriptio u applicatio s u guaranteed filter specification for 2.37v and 5v supply operates up to 30khz low power and 88db dynamic range at 2.5v supply center frequency q product up to 1.6mhz guaranteed offset voltages guaranteed clock-to-center frequency accuracy over temperature: 0.3% for ltc1060a 0.8% for ltc1060 guaranteed q accuracy over temperature low temperature coefficient of q and center frequency low crosstalk, 70db clock inputs ttl and cmos compatible single 5v supply medium frequency filters very high q and high dynamic range bandpass, notch filters tracking filters telecom filters single 5v, gain of 1000 4th order bandpass filter the ltc 1060 consists of two high performance, switched capacitor filters. each filter, together with 2 to 5 resistors, can produce various 2nd order filter functions such as lowpass, bandpass, highpass notch and allpass. the center frequency of these functions can be tuned by an external clock or by an external clock and resistor ratio. up to 4th order full biquadratic functions can be achieved by cascading the two filter blocks. any of the classical filter configurations (like butterworth, chebyshev, bessel, cauer) can be formed. the ltc1060 operates with either a single or dual supply from 2.37v to 8v. when used with low supply (i.e. single 5v supply), the filter typically consumes 12mw and can operate with center frequencies up to 10khz. with 5v supply, the frequency range extends to 30khz and very high q values can also be obtained. the ltc1060 is manufactured by using linear technology? enhanced ltcmos silicon gate process. because of this, low offsets, high dynamic range, high center frequency q product and excellent temperature stability are obtained. the ltc1060 is pinout compatible with mf10. features typical applicatio u amplitude response ltc1060 ?ta01 v in 1mv(rms) 0.1 f 3.16k 3.16k 100k 2k 100k l tc1060 2k 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 5v 5v output 1k 1k clock in 17.5khz input frequency (hz) 0 gain (db) 30 50 275 ltc1060 ?ta02 10 ?0 125 175 225 100 150 200 250 70 20 40 0 60 , ltc and lt are registered trademarks of linear technology corporation. ltcmos trademark of linear technology corporation.
2 lt c1060 1060fb order part number ltc1060acn ltc1060cn ltc1060csw ltc1060acj ltc1060mj ltc1060amj ltc1060cj top view j package 20-lead cerdip t jmax = 150 c, ja = 70 c/w t jmax = 100 c, ja = 100 c/w (n) 1 2 3 4 5 6 7 8 9 20 19 18 17 16 15 14 13 12 11 lp a bp a n/ap/hp a inv a s1a s a/b v a + v d + lsh clka lp b bp b n/ap/hp b inv b s1b agnd v a v d 50/100/hold clkb 10 n package 20-lead pdip sw package 20-lead plastic so wide t jmax = 150 c, ja = 80 c/w (sw) supply voltage ........................................................ 18v power dissipation .............................................. 500mw operating temperature range ltc1060ac/ltc1060c ................ 40 c t a 85 c ltc1060am/ltc1060m ............ 55 c t a 125 c storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c consult ltc marketing for parts specified with wider operating temperature ranges. (note 1) obsolete package consider the n20 and sw20 package for alternate source absolute axi u rati gs w ww u package/order i for atio uu w the denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. (complete filter) v s = 5v, unless otherwise noted. electrical characteristics parameter conditions min typ max units center frequency range f 0 ?q 400khz, mode 1, figure 4 0.1 to 20k hz (see applications information) f 0 ?q 1.6mhz, mode 1, figure 4 0.1 to 16k hz clock-to-center frequency ratio ltc1060a mode 1, 50:1, f clk = 250khz, q = 10 50 0.3% ltc1060 mode 1, 50:1, f clk = 250khz, q = 10 50 0.8% ltc1060a mode 1, 100:1, f clk = 500khz, q = 10 100 0.3% ltc1060 mode 1, 100:1, f clk = 500khz, q = 10 100 0.8% q accuracy ltc1060a mode 1, 50:1 or 100:1, f 0 = 5khz, q=10 0.5 3 % ltc1060 mode 1, 50:1 or 100:1, f 0 = 5khz, q=10 0.5 5 % f 0 temperature coefficient mode 1, f clk < 500khz ?0 ppm/ c q temperature coefficient mode 1, f clk < 500khz, q = 10 20 ppm/ c dc offset v os1 215 mv v os2 f clk = 250khz, 50:1, s a/b = high 340 mv v os2 f clk = 500khz, 100:1, s a/b = high 680 mv v os2 f clk = 250khz, 50:1, s a/b = low 230 mv v os2 f clk = 500khz, 100:1, s a/b = low 460 mv v os3 f clk = 250khz, 50:1, s a/b = low 230 mv v os3 f clk = 500khz, 100:1, s a/b = low 460 mv dc lowpass gain accuracy mode 1, r1 = r2 = 50k 0.1 2 % bp gain accuracy at f 0 mode 1, q = 10, f 0 = 5khz 0.1 % clock feedthrough f clk 1mhz 10 mv (p-p) max clock frequency 1.5 mhz power supply current 3 5 8 ma 12 ma crosstalk 70 db
3 lt c1060 1060fb the denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. (complete filter) v s = 2.37v. electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. parameter conditions min typ max units center frequency range f 0 ?q 100khz 0.1 to 10k hz clock-to-center frequency ratio ltc1060a mode 1, 50:1, f clk = 250khz, q = 10 50 0.5% ltc1060 mode 1, 50:1, f clk = 250khz, q = 10 50 0.8% ltc1060a mode 1, 100:1, f clk = 250khz, q = 10 100 0.5% ltc1060 mode 1, 100:1, f clk = 250khz, q = 10 100 0.8% q accuracy ltc1060a mode1, 50:1 or 100:1, f 0 = 2.5khz, q = 10 2% ltc1060 mode1, 50:1 or 100:1, f 0 = 2.5khz, q = 10 4% max clock frequency 500 khz power supply current 2.5 4 ma the denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. (internal op amps). parameter conditions min typ max units supply voltage range 2.37 8v v oltage swings ltc1060a 4 4v ltc01060 v s = 5v, r l = 5k (pins 1,2,19,20) 3.8 4v ltc01060, ltc01060a r l = 3.5k (pins 3,18) 3.6 4v output short-circuit current v s = 5v source 25 ma sink 3ma op amp gbw product v s = 5v 2 mhz op amp slew rate v s = 5v 7 v/ s op amp dc open loop gain r l = 10k, v s = 5v 85 db agnd to agnd inv b clk a clk b 50/100/hold level shift s 2a s 2b inva + + ltc1060 ?bd01 + + level shift non-overlap clock level shift non-overlap clock control 17 11 9 12 10 15 4 v d + v a + bp a lp a n/ap/hp a s1a 8 7 3 5 2 1 v d v a 14 13 19 20 18 bp b lp b n/ap/hp b s1b 16 s ab 6 ? ? block diagra w
4 lt c1060 1060fb graph 1. mode 1: (f clk /f 0 ) deviation vs q graph 2. mode 1: (f clk /f 0 ) deviation vs q graph 3. mode 1: q error vs clock frequency graph 7. mode 1: (f clk /f 0 ) vs f clk and q ideal q 0.1 ?.6 % deviation (f clk /f 0 ) ?.2 0.8 0.4 0 110 100 lt1060 ?tpc01 ?.0 ?.4 0.4 v s = 5v t a = 25 c f clk = 250khz = 50 (test point) f clk f 0 ideal q 0.1 0.3 % deviation (f clk /f 0 ) 0.2 0.1 0 0.1 110 100 lt1060 ?tpc02 0.4 0.5 0.6 f clk = 100 (test point) f clk f 0 v s = 5v t a = 25 c f clk = 500khz f clk (mhz) 0.2 0 deviation from ideal q (%) 10 0 10 20 0.6 1.0 1.2 2.0 ltc1060 ?tpc03 20 0.4 0.8 1.4 1.6 1.8 = 50:1 f clk f 0 = 100:1 f clk f 0 v s = 2.5v t a = 25 c v s = 2.5v v s = 5v v s = 5v 50 20 10 10 20 50 100 q = 5 100 20 10 20 q = 5 50 10 q = 5 q = 5 50 = 50:1 f clk f 0 v s = 5v t a = 25 c f clk (mhz) 0 deviation from 50:1 (%) 0.4 0.6 0.8 0.6 1.0 ltc1060 ?tpc07 0.2 0 0.2 0.4 0.8 1.2 1.4 0.2 0.4 q = 50 q = 5 q = 10 q = 20 typical perfor a ce characteristics uw graph 4. mode 1: q error vs clock frequency graph 5. mode 1: measured q vs f clk and temperature graph 6. mode 1: (f clk /f 0 ) vs f clk and q graph 8. mode 1: (f clk /f 0 ) vs f clk and temperature graph 9. mode 1: (f clk /f 0 ) vs f clk and temperature f clk (mhz) 0.2 0 deviation from ideal q (%) 10 0 200 50 10 20 0.6 1.0 1.2 2.0 ltc1060 ?tpc04 20 0.4 0.8 1.4 1.6 1.8 = 50:1 f clk f 0 = 100:1 f clk f 0 v s = 7.5v t a = 25 c 400 200 100 10 q = 5 50 400 100 q = 5 10 = 50:1 f clk f 0 = 100:1 f clk f 0 v s = 5v q = 10 f clk (mhz) 0.2 ?0 deviation from ideal q (%) 0 20 0 0.6 1.0 1.4 1.8 ltc1060 ?tpc05 20 0.4 0.8 1.2 1.6 85 c 125 c 85 c 125 c ?5 c ?5 c t a = 25 c t a = 25 c = 100:1 f clk f 0 v s = 5v t a = 25 c f clk (mhz) 0 deviation from 100:1 (%) 0.4 0.6 0.8 0.6 1.0 ltc1060 ?tpc06 0.2 0 0.2 0.4 0.8 1.2 1.4 0.2 0.4 q = 50 q = 5 q = 10 q = 20 f clk (mhz) 0.2 0.2 deviation from 100:1 (%) 0 0.2 0.6 0.6 1.0 1.4 1.8 ltc1060 ?tpc08 0.8 0.4 1.0 0.4 0.8 1.2 1.6 85 c t a = 25 c 125 c f clk f 0 = 100:1 v s = 5v q = 10 ?5 c f clk (mhz) 0.2 0.2 deviation from 50:1 (%) 0 0.2 0.6 0.6 1.0 1.4 1.8 ltc1060 ?tpc09 0.8 0.4 1.0 0.4 0.8 1.2 1.6 f clk f 0 = 50:1 v s = 5v q = 10 ?5 c t a = 25 c 85 c 125 c
5 lt c1060 1060fb graph 10. mode 1: (f clk /f 0 ) vs f clk and q graph 11. mode 1: (f clk /f 0 ) vs f clk and q graph 12. mode 1: (f clk /f 0 ) vs f clk and temperature graph 13. mode 1: (f clk /f 0 ) vs f clk and temperature graph 14. mode 1: notch depth vs clock frequency graph 15. mode 3: deviation of (f clk /f 0 ) with respect to q = 10 measurement graph 16. mode 3: q error vs clock frequency graph 17. mode 3 (r2 = r4): q error vs clock frequency graph 18. mode 3 (r2 = r4): measured q vs f clk and temperature = 100:1 f clk f 0 v s = 2.5v t a = 25 c f clk (mhz) 0 deviation from 100:1 (%) 0.6 0.8 1.0 300 500 ltc1060 ?tpc10 0.4 0.2 100 200 400 600 700 0 0.2 q = 50 q = 5 q = 20 q = 10 = 50:1 f clk f 0 v s = 2.5v t a = 25 c f clk (mhz) 0 deviation from 50:1 (%) 0.4 0.6 0.8 300 500 ltc1060 ?tpc11 0.2 0 100 200 400 600 700 0.2 0.4 q = 5 q = 10 q = 20 q = 50 f clk (khz) 0 deviation from 100:1 (%) 0 0.2 0.4 0.6 1 0.2 0.4 0.6 0.8 ltc1060 ?tpc12 1.0 1.2 0.8 = 100:1 f clk f 0 v s = 2.5v q = 10 ?5 c t a = 25 c 85 c 125 c f clk (khz) 0 deviation from 50:1 (%) 0 0.2 0.2 0.4 0.6 1.0 0.2 0.4 0.6 0.8 ltc1060 ?tpc13 1.0 1.2 0.8 = 50:1 f clk f 0 v s = 2.5v q = 10 ?5 c t a = 25 c 85 c 125 c f clk (mhz) 0 0 notch depth (db) 20 40 60 80 0.4 0.8 1.2 1.6 ltc1060 ?tpc14 100 120 0.2 0.6 1.0 1.4 v s = 5v t a = 25 c v in = 1v rms q = 10 100:1 q = 1 100:1 q = 10 50:1 ideal q (a) (b) 0.1 0.2 q = 10 measurement (%) deviation of f clk f o with respect to 0.1 0 0.1 110 100 ltc1060 ?tpc15 0.3 0.4 0.5 = 500: 1 f clk f o r2 = r4 1 5 = 200: 1 f clk f o r2 = r4 1 2 v s = 5v t a = 25 c pin 12 at 100:1 f clk (mhz) 0.2 0 q error (%) 10 0 10 20 0.6 1.0 1.2 2.0 ltc1060 ?tpc17 20 0.4 0.8 1.4 1.6 1.8 = 100:1 f clk f 0 v s = 7.5v t a = 25 c q = 5 q = 5 50 = 50:1 50 10 10 f clk f 0 = 50:1 f clk f 0 = 100:1 f clk f 0 v s = 5v q = 10 f clk (mhz) 0.2 ?0 deviation from ideal q (%) 0 20 0 0.6 1.0 1.4 1.8 ltc1060 ?tpc18 20 40 ?0 40 0.4 0.8 1.2 1.6 ?5 c ?5 c 125 c 85 c t a = 25 c 125 c 85 c t a = 25 c f clk (mhz) 0.2 0 deviation from ideal q (%) 10 0 10 20 0.6 1.0 1.2 2.0 ltc1060 ?tpc16 20 0.4 0.8 1.4 1.6 1.8 = 50:1 f clk f 0 = 100:1 f clk f 0 t a = 25 c 10 20 20 50 q = 5 q = 5 q = 5 20 20 10 10 v s = 2.5v v s = 5v v s = 2.5v v s = 5v 50 50 q = 5 10 50 typical perfor a ce characteristics uw
6 lt c1060 1060fb graph 19. mode 3 (r2 = r4): (f clk /f 0 ) vs f clk and q graph 20. mode 3 (r2 = r4): (f clk /f 0 ) vs f clk and q graph 21. mode 3 (r2 = r4): (f clk /f 0 ) vs f clk and temperature graph 22. mode 3 (r2 = r4): (f clk /f 0 ) vs f clk and temperature graph 23. mode 3 (r2 = r4): (f clk /f 0 ) vs f clk and temperature graph 24. mode 3 (r2 = r4): (f clk /f 0 ) vs f clk and temperature graph 25. mode 1c (r5 = 0), mode 2 (r2 = r4) q error vs clock frequency graph 26.supply current vs supply voltage = 100:1 f clk f 0 v s = 5v t a = 25 c f clk (mhz) 0 deviation from 100:1 (%) 0.4 0.6 0.8 0.6 1.0 ltc1060 ?tpc19 0.2 0 0.2 0.4 0.8 1.2 1.4 0.2 0.4 q = 20, q = 40, q = 50 q = 5 q = 10 = 50:1 f clk f 0 v s = 5v t a = 25 c f clk (mhz) 0 deviation from 50:1 (%) 0.4 0.6 0.8 0.6 1.0 ltc1060 ?tpc20 0.2 0 0.2 0.4 0.8 1.2 1.4 0.2 0.4 q = 10 q = 5 q = 50 q = 20 = 100:1 f clk f 0 v s = 5v q = 10 f clk (mhz) 0.2 0.2 deviation from100:1 (%) 0 0.2 0.6 0.6 1.0 1.4 1.8 ltc1060 ?tpc21 0.8 0.4 1.0 0.4 0.8 1.2 1.6 85 c 125 c t a = 25 c ?5 c = 100:1 f clk f 0 v s = 5v q = 10 f clk (mhz) 0.2 deviation from 50:1 (%) 0 0.2 0.6 0.6 1 1.4 1.8 ltc1060 ?tpc22 0.8 0.4 1.0 0.4 0.8 1.2 1.6 85 c ?5 c 125 c t a = 25 c f clk (mhz) 0 deviation from 100:1 (%) 0.2 0.4 0 0.2 0.4 0.8 0.2 0.4 0.6 0.8 ltc1060 ?tpc23 1.0 1.2 0.6 = 100:1 f clk f 0 v s = 2.5v q = 10 ?5 c t a = 25 c 85 c 125 c f clk (mhz) 0 deviation from 50:1 (%) 0 0.2 0.4 0.6 1.0 0.2 0.4 0.6 0.8 ltc1060 ?tpc24 1.0 0.8 = 100:1 f clk f 0 v s = 2.5v q = 10 ?5 c t a = 25 c 85 c 125 c f clk f 0 70.7 1 f clk f 0 35.37 1 v s = 5v t a = 25 c f clk (mhz) 0 deviation from ideal q (%) 10 20 0.6 1.0 ltc1060 ?tpc25 0 20 0.2 0.4 0.8 1.2 1.4 10 0 mode 2 r2 = r4 = q = 10 q = 10 q = 20 q = 20 mode 2 r2 = r4 20 20 supply voltage ( v) 0 2 4 6 8 10 12 14 16 18 20 supply current (ma) 3 5 7 9 ltc1060 ?tpc26 11 2 1 4 6 8 10 f clk 1mhz t a = ?5 c t a = 25 c t a = 125 c typical perfor a ce characteristics uw
7 lt c1060 1060fb operation of the device. by tying pin 12 to 1/2 supplies (which should be the agnd potential), the ltc1060 operates in the 100:1 mode. the 1/2 supply bias of pin 12 can vary around the 1/2 supply potential without affecting the 100:1 filter operation. this is shown in table 1. when pin 12 is shorted to the negative supply pin, the filter operation is stopped and the bandpass and lowpass outputs act as a s/h circuit holding the last sample. the hold step is 20mv and the droop rate is 150 v/second! table 1 voltage range of pin 12 total power supply for 100:1 operation 5v 2.5 0.5v 10v 5v 1v 15v 7.5v 1.5v s1 a , s1 b (pins 5 and 16) these are voltage signal input pins and, if used, they should be driven with a source impedance below 5k ? . the s1 a , s1 b pins can be used to alter the clk to center frequency ratio (f clk /f 0 ) of the filter (see modes 1b, 1c, 2a, 2b) or to feedforward the input signal for allpass filter configurations (see modes 4 and 5). when these pins are not used, they should be tied to the agnd pin. s a/b (pin 6) when s a/b is high, the s2 input of the filter? voltage summer (see block diagram) is tied to the lowpass output. this frees the s1 pin to realize various modes of operation for improved applications flexibility. when the s a/b pin is connected to the negative supply, the s2 input switches to ground and internally becomes inactive. this improves the filter noise performance and typically lowers the value of the offset v os2 . agnd (pln 15) this should be connected to the system ground for dual supply operation. when the ltc1060 operates with a single positive supply, the analog ground pin should be tied to 1/2 supply and bypassed with a 0.1 f capacitor, as shown in the application, ?ingle 5v, gain of 1000 4th order bandpass filter.?the positive inputs of all the power supplies the v + a and v + d (pins 7 and 8) and the v a and v d (pins 14 and 13) are, respectively, the analog and digital positive and negative supply pins. for most cases, pins 7 and 8 should be tied together and bypassed by a 0.1 f disc ceramic capacitor. the same holds for pins 13 and 14. if the ltc1060 operates in a high digital noise environment, the supply pins can be bypassed separately. pins 7 and 8 are internally connected through the ic substrate and should be biased from the same dc source. pins 13 and 14 should also be biased from the same dc source. the ltc1060 is designed to operate with 2.5v supply (or single 5v) and with 5v to 8v supplies. the mini- mum supply, where the filter operates reliably, is 2.37v. with low supply operation, the maximum input clock frequency is about 500khz. beyond this, the device exhib- its excessive q enhancement and center frequency errors. clock input pins and level shift the level shift (lsh) pin 9 is used to accommodate t 2 l or cmos clock levels. with dual supplies equal or higher to 4.5v, pin 9 should be connected to ground (same potential as the agnd pin). under these conditions the clock levels can be t 2 l or cmos. with single supply operation, the negative supply pins and the lsh pin should be tied to the system ground. the agnd, pin 15, should be biased at 1/2 supplies, as shown in the ?ingle 5v gain of 1000 4th order bandpass filter?circuit. again, under these conditions, the clock levels can be t 2 l or cmos. the input clock pins (10,11) share the same level shift pin. the clock logic threshold level over temperature is typically 1.5v 0.1v above the lsh pin potential. the duty cycle of the input clock should be close to 50%. for clock frequencies below 1mhz, the (f clk /f 0 ) ratio is independent from the clock input levels and from its rise and fall times. fast rising clock edges, however, improve the filter dc offsets. for clock frequencies above 1mhz, t 2 l level clocks are recommended. 50/100/hold (pin 12) by tying pin 12 to (v + a and v + d ), the filter operates in the 50:1 mode. with 5v supplies, pin 12 can be typically 1v below the positive supply without affecting the 50:1 pi n descriptio n a n d applicatio n s i n for m a tio uuu uu u w
8 lt c1060 1060fb internal op amps, as well as the reference point of all the internal switches are connected to the agnd pin. because of this, a ?lean?ground is recommended. f clk /f 0 ratio the f clk /f 0 reference of 100:1 or 50:1 is derived from the filter center frequency measured in mode 1, with a q = 10 and v s = 5v. the clock frequencies are, respectively, 500khz/250khz for the 100:1/150:1 measurement. all the curves shown in the typical performance characteristics section are normalized to the above references. graphs 1 and 2 in the typical performance characteristics show the (f clk /f 0 ) variation versus values of ideal q. the ltc1060 is a sampled data filter and it only approximates continuous time filters. in this data sheet, the ltc1060 is treated in the frequency domain because this approxima- tion is good enough for most filter applications. the ltc1060 deviates from its ideal continuous filter model when the (f clk /f 0 ) ratio decreases and when the q? are low. since low q filters are not selective, the frequency domain approximation is well justified. in graph 15 the ltc1060 is connected in mode 3 and its ( f clk /f 0 ) ratio is adjusted to 200:1 and 500:1. under these conditions, the filter is over-sampled and the (f clk /f 0 ) curves are nearly independent of the q values. in mode 3, the ( f clk /f 0 ) ratio typically deviates from the tested one in mode 1 by 0.1%. f 0 x q product ratio this is a figure of merit of general purpose active filter building blocks. the f 0 x q product of the ltc1060 depends on the clock frequency, the power supply volt- ages, the junction temperature and the mode of operation. at 25 c ambient temperature for 5v supplies, and for clock frequencies below 1mhz, in mode 1 and its derivatives, the f 0 x q product is mainly limited by the desired f 0 and q accuracy. for instance,from graph 4 at 50:1 and for f clk below 800khz, a predictable ideal q of 400 can be obtained. under this condition, a respectable f 0 x q product of 6.4mhz is achieved. the 16khz center frequency will be about 0.22% off from the tested value at 250khz clock (see graph 1). for the same clock frequency of 800khz and for the same q value of 400, the f 0 x q product can be further increased if the applicatio s i for atio wu uu clock-to-center frequency is lowered below 50:1. in mode 1c with r6 = 0 and r6 = , the (f clk /f 0 ) ratio is 50/ 2. the f 0 x q product can now be increased to 9mhz since, with the same clock frequency and same q value, the filter can handle a center frequency of 16khz x 2. for clock frequencies above 1mhz, the f 0 x q product is limited by the clock frequency itself. from graph 4 at 7.5v supply, 50:1 and 1.4mhz clock, a q of 5 has about 8% error; the measured 28khz center frequency was skewed by 0.8% with respect to the guaranteed value at 250khz clock. under these conditions, the f 0 x q product is only 140khz but the filter can handle higher input signal frequencies than the 800khz clock frequency, very high q case described above. mode 3, figure 11, and the modes of operation where r4 is finite, are ?lower?than the basic mode 1. this is shown in graph 16 and 17. the resistor r4 places the input op amp inside the resonant loop. the finite gbw of this op amp creates an additional phase shift and enhances the q value at high clock frequencies. graph 16 was drawn with a small capacitor, c c , placed across r4 and as such, at v s = 5v, the (1/2 r4c c ) = 2mhz. with v s = 2.5v the (1/ 2 r4c c ) should be equal to 1.4mhz. this allows the q curve to be slightly ?latter?over a wider range of clock frequencies. if, at 5v supply, the clock is below 900khz (or 400khz for v s = 2.5v), this capacitor, c c , is not needed. for graph 25, the clock-to-center frequency ratios are altered to 70.7:1 and 35.35:1. this is done by using mode 1c with r5 = 0, figure 7, or mode 2 with r2 = r4 = 10k ? . the mode 1c, where the input op amp is outside the main loop, is much faster. mode 2, however, is more versatile. at 50:1, and for t a = 25 c the mode 1c can be tuned for center frequencies up to 30khz. output noise the wideband rms noise of the ltc1060 outputs is nearly independent from the clock frequency, provided that the clock itself does not become part of the noise. the ltc1060 noise slightly decreases with 2.5v supply. the noise at the bp and lp outputs increases for high q?. table 2 shows typical values of wideband rms noise. the num- bers in parentheses are the noise measurement in mode 1 with the s a/b pin shorted to v as shown in figure 25.
9 lt c1060 1060fb table 2. wideband rms noise f clk notch/hp bp lp v s f 0 ( v rms )( v rms )( v rms ) conditions 5v 50:1 49 (42) 52 (43) 75 (65) mode1, r1 = r2 = r3 5v 100:1 70 (55) 80 (58) 90 (88) q = 1 2.5v 50:1 33 (31) 36 (32) 48 (43) 2.5v 100:1 48 (40) 52 (40) 66 (55) 5v 50:1 20 (18) 150 (125) 186 (155) mode 1, q = 10 5v 100:1 25 (21) 220 (160) 240 (180) r1 = r3 for bp out 2.5v 50:1 16 (15) 100 (80) 106 (87) r1 = r2 for lp out 2.5v 100.1 20 (17) 150 (105) 150 (119) 5v 50:1 57 57 62 mode 3, r1 = r2 = r3 = r4 5v 100:1 72 72 80 q = 1 2.5v 50:1 40 40 42 2.5v 100.1 50 50 53 5v 50:1 135 120 140 mode 3, r2 = r4, q = 10 5v 100:1 170 160 185 r3 = r1 for bp out 2.5v 50:1 100 88 100 r4 = r1 for lp and hp out 2.5v 100:1 125 115 130 short-circuit currents short circuits to ground, positive or negative power supply are allowed as long as the power supplies do not exceed 5v and the ambient temperature stays below 85?c. above 5v and at elevated temperatures, continuous short circuits to the negative power supply will cause excessive currents to flow. under these conditions, the device will get damaged if the short-circuit current is allowed to exceed 80ma. each building block of the ltc1060, together with an external clock and a few resistors, closely approximates 2nd order filter functions. these are tabulated below in the frequency domain. 1. bandpass function: available at the bandpass output pins 2 (19). (figure 1.) g(s) = h obp s o /q s 2 + (s o /q) + o 2 h obp = gain at = o f 0 = /2 ; f 0 is the center frequency of the complex pole pair. at this frequency, the phase shift between input and output is 180?. q = quality factor of the complex pole pair. it is the ratio of f 0 to the 3db bandwidth of the 2nd or- der bandpass function. the q is always mea- sured at the filter bp output. 2. lowpass function: available at the lp output pins 1 (20). (figure 2.) g(s) = h olp o s 2 + s( o /q) + o 2 2 h olp dc gain of the lp output. applicatio s i for atio wu uu defi n itio n of filter fu n ctio n s uu uu
10 lt c1060 1060fb 3. highpass function: available only in mode 3 at the ouput pins 3 (18). (figure 3.) g(s) = h ohp h ohp = gain of the hp output for f s 2 s 2 + s( o /q) + o f clk 2 2 4. notch function: available at pins 3 (18) for several modes of operation. g(s) = (h on2 ) h on2 = gain of the notch output for f s 2 + 2 o s 2 + (s o /q) + o f clk 2 2 h on1 = gain of the notch output for f 0 f n = n /2 ; f n is the frequency of the notch occurrence. 5. allpass function: available at pins 3(18) for mode 4, 4a. g(s) = h oap h oap = gain of the allpass output for 0 < f < [s 2 ?s( o /q) + o ] s 2 + s( o /q) + o f clk 2 2 2 for allpass functions, the center frequency and the q of the numerator complex zero pair is the same as the denominator. under these conditions, the magnitude response is a straight line. in mode 5, the center frequency f z , of the numerator complex zero pair, is different than f 0 . for high numerator q?, the magnitude response will have a notch at f z . table 3. modes of operation: 1st order functions mode pin 2 (19) pin 3 (18) f c f z 6a lp hp f clk 100(50) r2 r3 6b lp lp f clk 100(50) r2 r3 7lpap f clk 100(50) r2 r3 f clk 100(50) r2 r3 figure 1 figure 2 figure 3 f 0 ; f 0 = f h f l f l f h h obp 0.707 h obp f 0 f l f h q = ? 20 1 2 2q f l = f 0 ++ 1 ( ( ( ) 1 2q 1 2 2q f h = f 0 ++ 1 ( ( ( ) bandpass output f(log scale) gain (v/v) tlc1060 ?dff01 h op h olp f p f c 0.707 h olp 1 2 2q f c = f 0 ? ?+ + 1 ( ( 1 2 2 2q 1 ? ( ( lowpass output f(log scale) gain (v/v) tlc1060 ?dff02 1 2 2q 1 1 q f p = f 0 h op = h olp 1 ? 1 2 4q 1 ? f c 1 2 2q f c = f 0 ? ++ 1 ?1 ?1 1 ( ( 1 2 2 2q 1 ? ( ( f(log scale) tlc1060 ?dff03 h op h ohp f p 0.707 h ohp highpass output gain (v/v) 1 2 2q 1 q f p = f 0 h op = h ohp 1 ? 1 2 4q 1 ? defi n itio n of filter fu n ctio n s uu uu odes of operatio uw
11 lt c1060 1060fb table 4. modes of operation: 2nd order functions mode pin 1 (20) pin 2 (19) pin 3 (18) f 0 f n 1lpbp notch f clk 100(50) 1a lp bp bp f clk 100(50) 1b lp bp notch 1c lp bp notch 2lpbp notch f clk 100(50) 2a lp bp notch 2b lp bp notch 3lpbphp 3a lp bp notch 4lpbpap f clk 100(50) 4a lp bp ap 5lpbpcz figure 4. mode 1: 2nd order filter providing notch, bandpass, lowpass figure 5. mode 1a: 2nd order filter providing bandpass, lowpass 1/2 ltc1060 s a/b v in f 0 =; f n = f 0 ; h olp =; h on1 = ; q = ; h obp = f clk 100(50) tlc1060 ?moo01 1 + + r1 r3 r2 n (18) lp (20) bp (19) s1a (16) v + (17) r2 r1 r3 r1 r3 r2 r2 r1 15 4 3 5 2 6 ? 1/2 ltc1060 s a/b v in f 0 =; q =; h obp1 = ; h obp2 = 1(non-inverting) h olp = ?1 f clk 100(50) tlc1060 ?moo02 1 + + r3 r2 bp2 (18) lp (20) bp1 (19) s1a (16) v + (17) r3 r2 r3 r2 15 4 3 5 2 6 f clk 100(50) r6 r5 + r6 f clk 100(50) r6 r5 + r6 ? + f clk 100(50) r6 r5 + r6 ? + f clk 100(50) r6 r5 + r6 ? + f clk 100(50) r2 r4 ? + f clk 100(50) r6 r5 + r6 ? + + f clk 100(50) r2 r4 r6 r5 + r6 ? f clk 100(50) r2 r4 r6 r5 + r6 f clk 100(50) r6 r5 + r6 f clk 100(50) r2 r4 f clk 100(50) r2 r4 f clk 100(50) r h r i f clk 100(50) r2 r4 ? + f clk 100(50) r2 r4 ? f clk 100(50) r1 r4 odes of operatio uw
12 lt c1060 1060fb figure 6. mode 1b: 2nd order filter providing notch, bandpass, lowpass figure 7. mode 1c: 2nd order filter providing notch, bandpass, lowpass figure 8. mode 2: 2nd order filter providing notch, bandpass, lowpass figure 9. mode 2a: 2nd order filter providing notch, bandpass, lowpass 1/2 ltc1060 s a/b v in 1 + + r3 r6 r5 r2 r1 nlp (20) bp (19) s1a (16) v (17) 15 4 3 5 2 6 f 0 =; f n = f 0 ; q = f clk 100(50) tlc1060 ?moo03 f clk 2 r6 r5 + r6 r6 r5 + r6 r3 r2 () r2/r1 r6/(r5 + r6) r2 r1 h 0n1 (f 0) = h 0n2 = r3 r1 ; h 0lp = ; r5 < 5k ? ; h 0bp = f ? 1/2 ltc1060 s a/b v in 1 + + r3 r6 r5 r2 r1 n (18) lp (20) bp (19) s1a (16) v + (17) 15 4 3 5 2 6 f 0 =1 +; f n = f 0 ; q = ; f clk 100(50) tlc1060 ?moo04 f clk 2 r6 r5 + r6 r3 r2 () 1 + r6 r5 + r6 ? 2/r1 1 + r6/(r5 + r6) r2 r1 h 0n1 (f 0) = h 0n2 = r3 r1 ; h 0bp = ; h 0lp = ; r5 < 5k ? f ? 1/2 ltc1060 s a/b v in 1 + + r3 r4 r2 r1 n (18) lp (20) bp (19) s1a (16) v + (17) 15 4 3 5 2 6 f 0 =1 +; f n = ; q = ; h 0lp = f clk 100(50) tlc1060 ?moo05 f clk 100(50) f clk 2 r3 r2 r2 r4 () 1 + r2 r4 r2/r1 1 + (r2 + r4) r2/r1 1 + (r2 + r4) h 0bp = ?r3/r1 ; h 0n1 (f 0) == ?r2/r1 ; h 0n2 = f 1/2 ltc1060 s a/b v in 1 + + r3 r6 r5 r4 r2 r1 n (18) lp (20) bp (19) s1a (16) v + (17) 15 4 3 5 2 6 f 0 =1 ++ ; f n = ; q = f clk 100(50) tlc1060 ?moo06 f clk 100(50) f clk 2 r3 r2 r2 r1 r2 r4 () r6 r5 + r6 1 + + r2 r4 r6 r5 + r6 1 + r6 r5 + r6 1 + r6/(r5 + r6) 1 + (r2/r4) + [r6/(r5 + r6)] ?2/r1 1 + (r2/r4) + [r6/(r5 + r6)] h 0n1 (f 0) = = ?r2/r1 ; h 0n2 f h 0bp = ?r3/r1 ; h 0lp = odes of operatio uw
13 lt c1060 1060fb figure 10. mode 2b: 2nd order filter providing notch, bandpass, lowpass figure 11. mode 3: 2nd order filter providing highpass, bandpass, lowpass figure 12. mode 3a: 2nd order filter providing highpass, bandpass, lowpass, notch 1/2 ltc1060 s a/b v in 1 + + r3 r6 r5 r4 r2 r1 n (18) lp (20) bp (19) s1a (16) v (17) 15 4 3 5 2 6 f 0 =+; f n = ; q = f clk 100(50) tlc1060 ?moo07 f clk 100(50) f clk 2 r3 r2 r2 r1 r2 r4 () r6 r5 + r6 + r2 r4 r6 r5 + r6 r6 r5 + r6 r6/(r5 + r6) (r2/r4) + [r6/(r5 + r6)] r2/r1 (r2/r4) + [r6/(r5 + r6)] h 0n1 (f 0) = = ?r2/r1 ; h 0n2 f h 0bp = ?r3/r1 ; h 0lp = 1/2 ltc1060 s a/b v in 1 + + r3 r4 r2 r1 n (18) lp (20) bp (19) s1a (16) v (17) 15 4 3 5 2 6 f 0 =; q = ; h 0hp = r2/r1; h 0bp = r3/r1; h 0lp = r4/r1 f clk 100(50) tlc1060 ?moo08 r3 r2 r2 r4 r2 r4 1/2 ltc1060 notch s a/b v in 1 + + r3 r4 r2 r h r g r i r1 hp (18) lp (20) bp (19) s1a (16) v (17) 15 4 3 5 2 6 f 0 =; f n = ; h 0hp = r2/r1; h 0bp = r3/r1, h 0lp = r4/r1 f clk 100(50) tlc1060 ?moo09 f clk 100(50) f clk 2 r2 r4 (( )) r h r i r g r i r g r i r g r h r4 r1 r3 r2 r2 r4 h 0n1 (f 0) == r g r h r2 r1 ; h 0n2 ; h 0n (f = f 0 ) = q ; q = h 0lp ? 0hp f + external op amp odes of operatio uw
14 lt c1060 1060fb figure 13. mode 4: 2nd order filter providing allpass, bandpass, lowpass figure 14. mode 4a: 2nd order filter providing highpass, bandpass, lowpass, allpass figure 15. mode 5: 2nd order filter providing numerator complex zeros, bandpass, lowpass figure 16. mode 6a: 1st order filter providing highpass, lowpass 1/2 ltc1060 s a/b v in f 0 =; q =; h oap = ; h olp = ? h obp = ?2 f clk 100(50) tlc1060 ?moo10 1 + + r3 r2 r1 = r2 ap2 (18) lp (20) bp (19) s1a (16) v + (17) r3 r2 r3 r2 r2 r1 15 3 5 2 6 4 () ? 1/2 ltc1060 s a/b v in 1 + + r3 r4 r2 2r r r5 r1 hp (18) lp (20) bp (19) s1a (16) v (17) 15 4 5 2 6 f 0 =; q = ; h 0bp = ; h 0ap = ; h 0hp = f clk 100(50) tlc1060 ?moo11 r2 r4 r3 r2 r3 r1 ; h 0lp = r4 r1 r2 r1 r5 2r r2 r4 + external op amp 3 ? 1/2 ltc1060 s a/b v in tlc1060 ?moo12 1 + + r3 r4 r2 r1 cz (18) lp (20) bp (19) s1a (16) v + (17) 15 3 5 2 6 4 f 0 = q 2 = 1 + ; f z = ; q = f clk 100(50) f clk 100(50) f clk 2 r2 r4 r3 r1 () 1 + r2 r4 1 r1 r4 r3 r2 = 1 ; h oz = (f 0) = r1 r4 r3 r2 = r2 r1 (r4/r1) ? (r4/r2) + 1 ; h oz ; f () = r2 r1 1 + (r2/r1) 1 + (r2/r4) h obp ; h olp 1 + ? 1/2 ltc1060 s a/b v in 1 + + r3 r2 r1 n (18) lp (20) bp (19) s1a (16) v (17) 15 4 3 5 2 6 f c =; h 0lp = r3/r1 ; h 0hp = r2/r1 f clk r2 100(50) r3 tlc1060 ?moo13 odes of operatio uw
15 lt c1060 1060fb co mm e ts o n the m odes of operatio u u w w w u there are basically three modes of operation: mode 1, mode 2, mode 3. in the mode 1 (figure 4), the input amplifier is outside the resonant loop. because of this, mode 1 and its derivatives (mode 1a, 1b, 1c) are faster than modes 2 and 3. in mode 1, for instance, the q errors are becoming noticeable above 1mhz clock frequency. mode 1a (figure 5), represents the most simple hook-up of the ltc1060. mode 1a is useful when voltage gain at the bandpass output is required. the bandpass voltage gain, however, is equal to the value of q; if this is acceptable, a second order, clock tunable, bp resonator can be achiev- ed with only 2 resistors. the filter center frequency directly depends on the external clock frequency. for high order filters, mode 1a is not practical since it may require several clock frequencies to tune the overall filter response. mode 1 (figure 4), provides a clock tunable notch; the depth is shown in graph 14. mode 1 is a practical configuration for second order clock tunable bandpass/ notch filters. in mode 1, a bandpass output with a very high q, together with unity gain, can be obtained without creating problems with the dynamics of the remaining notch and lowpass outputs. modes 1b and 1c (figures 6 and 7), are similar. they both produce a notch with a frequency which is always equal to the filter building block center frequency. the notch and the center frequency, however, can be adjusted with an external resistor ratio. the practical clock-to-center frequency ratio range is: ? f clk f 0 500 1 100 1 or ; mode 1b 50 1 ? f clk f o 100 1 100 2 or or ; mode 1c 50 1 50 2 the input impedance of the s1 pin is clock dependent, and in general r5 should not be larger than 5k. mode 1b can be used to increase the clock-to-center frequency ratio beyond 100:1. for this mode, a practical limit for the (f clk /f 0 ) ratio is 500:1. beyond this, the filter will exhibit large output offsets. mode 1c is the fastest mode of operation: in the 50:1 mode and with (r5 = 0, r6 = ) the clock-to-center frequency ratio becomes (50/ 2) and cen- ter frequencies beyond 20khz can easily be achieved as shown in graph 25. figure 19 illustrates how to cascade the two sections of the ltc1060 connected in mode 1c to obtain a sharp fourth order, 1db ripple, bp chebyshev filter. note that the center frequency to the bw ratio for this fourth order bandpass filter is 20/1. by varying the clock frequency to sweep the filter, the center frequency of the overall filter will increase proportionally and so will the bw to maintain the 20:1 ratio constant. all the modes of operation yield constant q?; with any filter realization the bw? will vary when the filter is swept. this is shown in figure 19, where the bp filter is swept from 1khz to 20khz center frequency. figure 17. mode 6b: 1st order filter providing lowpass figure 18. mode 7: 1st order filter providing allpass, lowpass 1/2 ltc1060 s a/b v in f c =; h olp1 = 1 ; h olp2 = ? f clk r2 100(50) r3 tlc1060 ?moo14 1 + + r3 r2 lp1 (18) (20) lp2 (19) s1a (16) v (17) r3 r2 15 4 3 5 2 6 ? 1/2 ltc1060 s a/b v in f p =; f z =; gain at ap output = 1 for 0 f h olp = 2 x f clk r2 100(50) r3 tlc1060 ?moo15 1 + + r3 r2=r1 r1=r2 ap (18) (20) lp (19) s1a (16) v (17) f clk r2 100(50) r3 f clk 2 r3 r2 15 3 5 2 6 4 ? odes of operatio uw
16 lt c1060 1060fb modes 2, 2a, and 2b have a notch output which frequency, f n , can be tuned independently from the center frequency, f 0 . for all cases, however, f n 17 lt c1060 1060fb mode 2b section (figure 22), has a gain exceeding unity which limits the dynamic range of the overall filter. for very selective bandpass/bandreject filters, the mode 3a approach, as in figure 20, yields better dynamic range since the external op amp helps to optimize the dynamics of the output nodes of the ltc1060. figure 20. combining mode 3 with mode 3a to make the 4th order bp filter of figure 21 with improved dynamics. the gain at each output node is 0db for all input frequencies. figure 21. the bp filter of figure 20, when swept from a 2khz to 20khz center frequency. 1.5khz ?0db ?0db ?0db 0db 2.5khz ?0db ?0db 2khz 1.75khz 2.25khz f clk = 100khz 15khz ?0db ?0db ?0db 0db 25khz ?0db ?0db 20khz 17.5khz 22.5khz f clk = 1mhz tlc1060 ?cmo03 ltc1060 ?cm02 v in r42 r32 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 v + = 7.5v ?.5v v out t 2 l or cmos clock in r22 ltc1060 r11 7.5v precise resistor values r11 = 155.93k r h1 = 13.2k r42 = 5k note: for clock frequencies above 700khz, a 12pf capacitor across r41 and a 20pf capacitor across r42 were used to prevent the passband ripple from any additional peaking r21 = 5k r l1 = 10.74k r l2 = 6.11k r31 = 152k r22 = 5.26k r h2 = 5k r41 = 5.27k r32 = 151.8k r g = 37.3k ?.5v r31 r21 r41 r l1 r h1 r l2 r h2 + r g external op amp lp a bp a hp a inv a s1a s a/b v a + v d + lsh clk a lp b bp b hp b inv b s1b agnd v a v d 50/100 clk b co mm e ts o n the m odes of operatio u u w w w u
18 lt c1060 1060fb figure 22. combining mode 3 with mode 2b to create a 4th order br elliptic filter with 1db ripple and a ratio of 0db to stop bandwidth equal to 9/1. figure 23. amplitude response of the notch filter of figure 22 switched capacitor integrators generally exhibit higher input offsets than discrete r, c integrators. these offsets are mainly due to the charge injection of the cmos switches into the integrating capacitors and they are temperature independent. the internal op amp offsets also add to the overall offset budget and they are typically a couple of millivolts. be- cause of this, the dc output offsets of switched capacitor filters are usually higher than the offsets of discrete active filters. figure 24 shows half of an ltc1060 filter building block with its equivalent input offsets v os1 , v os2 , v os3 . all three are 100% tested for both sides of the ltc1060. v os2 is generally the larger offset. when the s a/b , pin 6, of the ltc1060 is shorted to the negative supply (i.e., mode 3), the value of the v os2 decreases. additionally, with s a/b low, a 20% to 30% noise reduction is observed. mode 1 can still be achieved, if desired, by shorting the s1 pin to the lowpass output (figure 25). ltc1060 ?cm04 v in r31 r21 r52 r32 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 v + = 5v ?v v out t 2 l or cmos clock in r41 r l1 r h1 r22 r62 r42 lp a bp a hp a inv a s1a s a/b v a + v d + lsh clk a lp b bp b n b inv b s1b agnd v a v d 50/100 clk b ltc1060 r11 resistor values r11 = 60k r41 = 28.84k r52 = 5k r32 = 455.75k r21 = 5k r h1 = 5k r62 = 1.59k r42 = 503.85k r31 = 54.75k r l1 = 19.3k r22 = 60k v = 5v 0.7 ?0 ?0 ?0 0 1.1 1.2 1.3 ?0 ?0 ?0 0.9 0.8 f 0 = 1.0 v out /v in (db) input frequency normalized to filter center frequency tlc1060 ?cmo05 f clk f 0 200 1 =; f clk 1mhz + (17) 4 ++ + (18) (16) (19) (20) 15 v os1 v os2 3 5 tlc1060 ?lo01 1 2 + + + v os3 figure 24. equivalent input offsets of 1/2 ltc1060 filter building block figure 25. mode 1(ln): same operation as mode 1 but lower v os2 offset and lower noise l tc1060 offsets co mm e ts o n the m odes of operatio u u w w w u 1/2 ltc1060 s a/b v in 1 + + r3 r2 r1 n (18) lp (20) bp (19) s1a (16) v (17) 15 4 3 5 2 6 tlc1060 ?lo02
19 lt c1060 1060fb output offsets the dc offset at the filter bandpass output is always equal to v os3 . the dc offsets at the remaining two outputs (notch and lp) depend on the mode of operation and external resistor ratios. table 5 illustrates this. it is important to know the value of the dc output offsets, especially when the filter handles input signals with large dynamic range. as a rule of thumb, the output dc offsets increase when: 1. the q? decrease. 2. the ratio (f clk /f 0 ) increases beyond 100:1. this is done by decreasing either the (r2/r4) or the r6/(r5 + r6) resistor ratios. information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. n package 20-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510) l tc1060 offsets u package descriptio .255 .015* (6.477 0.381) 1.040* (26.416) max 12 3 4 5 6 7 8 910 19 11 12 13 14 16 15 17 18 20 note: 1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) n20 1002 .020 (0.508) min .120 (3.048) min .125 ?.145 (3.175 ?3.683) .065 (1.651) typ .045 ?.065 (1.143 ?1.651) .018 .003 (0.457 0.076) .005 (0.127) min .100 (2.54) bsc .008 ?.015 (0.203 ?0.381) .300 ?.325 (7.620 ?8.255) .325 +.035 ?015 + 0.889 0.381 8.255 () table 5 v osn v osbp v oslp mode pin 3 (18) pin 2 (19) pin 1 (20) 1,4 v os1 [(1/q) + 1 + ||h olp ||] ?v os3 /q v os3 v osn ?v os2 1a v os1 [1 + (1/q)] ?v os3 /q v os3 v osn ?v os2 1b v os1 [(1/q) + 1 + r2/r1] ?v os3 /q v os3 ~ (v osn ?v os2 ) (1 + r5/r6) 1c v os1 [(1/q) + 1 + r2/r1] ?v os3 /q v os3 (r5 + r6) (r5 + 2r6) ~(v osn ?v os2 ) 2, 5 [v os1 (1 + r2/r1 + r2/r3 + r2/r4) ?v os3 (r2/r3)] v os3 v osn ?v os2 ?[r4/(r2 + r4)] + v os2 [r2/(r2 + r4)] 2a v os3 (r5 + r6) (r5 + 2r6) ~(v osn ?v os2 ) 2b v os3 ~ (v osn ?v os2 ) (1 + r5/r6) 3, 4a v os2 v os3 r4 r1 v os1 1 + v os2 + r4 r2 + r4 r3 r4 r2 ?v os3 r4 r3 r4(1 + k) r2 + r4(1 + k) + v os2 ;k = r2 r2 + r4(1 + k) r6 r5 + r6 [v os1 (1 + r2/r1 + r2/r3 + r2/r4) ?v os3 (r2/r3)] r4k r2 + r4k + v os2 ;k = r2 r2 + r4k r6 r5 + r6 [v os1 (1 + r2/r1 + r2/r3 + r2/r4) ?v os3 (r2/r3)]
20 lt c1060 1060fb linear technology corporation 1 630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com lw/tp 1202 1k rev b ?printed in usa ? l inear technology corporation 1988 j package 20-lead cerdip (narrow .300 inch, hermetic) (reference ltc dwg # 05-08-1110) obsolete package s20 (wide) 0502 note 3 .496 ?.512 (12.598 ?13.005) note 4 20 n 19 18 17 16 15 14 13 1 23 4 5 6 78 .394 ?.419 (10.007 ?10.643) 910 n/2 11 12 .037 ?.045 (0.940 ?1.143) .004 ?.012 (0.102 ?0.305) .093 ?.104 (2.362 ?2.642) .050 (1.270) bsc .014 ?.019 (0.356 ?0.482) typ 0 ?8 typ note 3 .009 ?.013 (0.229 ?0.330) .016 ?.050 (0.406 ?1.270) .291 ?.299 (7.391 ?7.595) note 4 45 .010 ?.029 (0.254 ?0.737) .420 min .325 .005 recommended solder pad layout .045 .005 n 123 n/2 .050 bsc .030 .005 typ .005 (0.127) rad min inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options 4. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) sw package 20-lead plastic small outline (wide .300 inch) (reference ltc dwg # 05-08-1620) u package descriptio j20 0801 3 7 56 10 9 1 4 2 8 11 20 16 15 17 14 13 12 19 18 .005 (0.127) min .025 (0.635) rad typ .220 ?.310 (5.588 ?7.874) 1.060 (26.924) max 0 ?15 .008 ?.018 (0.203 ?0.457) .015 ?.060 (0.381 ?1.524) .125 (3.175) min .014 ?.026 (0.356 ?0.660) .045 ?.065 (1.143 ?1.651) .100 (2.54) bsc .200 (5.080) max .300 bsc (7.62 bsc) .045 ?.065 (1.143 ?1.650) full lead option .023 ?.045 (0.584 ?1.143) half lead option corner leads option (4 plcs) note: lead dimensions apply to solder dip/plate or tin plate leads

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